Explain the following terms – (i) MOSIS scalable CMOS design rules (ii) Micron design rules.

Explain the following terms – (i) MOSIS scalable CMOS design rules (ii) Micron design rules.

Ans. (i) MOSIS Scalable CMOS Design Rules – Academic designs often use the -based scalable CMOS design rules from MOSIA because they are simple and freely available, and they allow designs to easily migrate from one process to another. These advantages come at the expense of being conservative because they must work for all manufacturing processes.

MOSIS actually has three sets of rules-SCMOS, SUBM and DEEP. The SUBM rules are somewhat more conservative than SCMOS rules. DEEP rules are even more conservative. The more conservative rules allow us to use a slightly smaller value of  while still satisfying all of the micro design rules for a process. Table 5.1 lists some of the foundry processes MOSIS has offered and associate value of  for the different rule sets. For example, the AMI 0.5 m process can use the SCMOS rules with  = 0.35 m or the SUBM rules with = 0.30m. SUBM rules are a good choice for class projects because they are somewhat easier to use than DEEP (no half- rules), while still being compatible with most processes. Some processes offer a second poly silicon layer for floating-gate transistors and poly-insulator-poly capacitors used in analog circuits.

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For design rules where the minimum drawn gate length exceeds the feature size, MOSISA applies a poly silicon bias to shrink the gates by a uniform amount before masks are made. For example in the SUBM rules for the AMI 0.5 mm process with  = 0.3 m, a bias of – 0.1 m is applied to all poly silicon. Thus, a 2 transistor gate is 0.5 m rather than 0.6 m and a 4 gate is 1.1 m rather than 1.2 m. When simulating circuits, be sure to use the biased channel lengths to accurately model the transistor behavior. Table 5.2 lists in more detail the MOSIS design rules that are generally relevant to designers for a process with N metal layers. Fig. 5.16 illustrates many of these rules.

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(ii)Micron Design Rules – Table 5.3 lists a set of micron design rules for a hypothetical 90 nm process representing an amalgamation of several real processes. Observe that the rules differ slightly but not immensely but not immensely from lambda-based rules with  = 0.05 m.

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