Discuss the microcoded controller in detail.

Discuss the microcoded controller in detail.

Ans. Fig. 4.6 shows a microcoded controller consists of a memory in which contents are known as microinstructions and a next-address sequencer that directs the execution sequence of microinstructions. During a clock a clock cycle, a microinstruction is a set of encoded control bits that direct the operation of the logic. The execution hardware of microcoded controller is fixed, and the functions worked are a result of instructions placed and is thus known as micro ROM. A microcoded controller can also be regular and hence, due to the microcoded controller comprises primarily of memory. Although, this method is used primarily for larger machines due to microcode controllers need the overhead of aq next-address sequencer that needs design time and integrated circuit area.


If status inputs are not given, the next-address sequencer generates the next instruction addresses in a fixed pattern by incrementing a counter. A microcoded controller configured in this manner functions as an open-loop controller with a fixed execution sequence. If status inputs are given, the next-address sequencer can modify the next instruction address, depending on conditions occurred by the status inputs. This gives a conditional branching capability. In both the cases, the microcoded controller function is obtained primarily by a program placed in its micro ROM.

A typical memory organization far a microcoded controller comprising a memory address register (MAR) and a micro ROM is fig. 4.7, whereas most semiconductor memory chips are arranged with a narrow data bus and a wide address bus. Generally, the memory for a microcoded controller has a wide data bus compare to its address bus. Most of these data lines are allocated to driving control points within the system. A few data lines are allocated to give next-address information to the next-address sequencer. In order to determine the next micro instruction address, the next-address sequencer uses this address information along with status inputs from the controlled process.



Fig.4.8 shows an alternative from for the micro ROM. This two-level micro program memory comprises a relatively small micro ROM driving a secondary memory known as nano ROM. This organization is based on two reasonable assumptions as follows –

  1. Only a few of the 272 possible control word combinations of fig. 4.7 are achieved in a given system.
  2. Many if the control words that are achieved will be needed repeatedly.

For example, if fever 256 unique control words are achieved and the micro program memory is arranged as shown in fig. 4.8, only about 50 k bits of control memory are needed.



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